An Introduction to Mixed-Signal IC Test and Measurement

Hardcover | November 3, 2011

byGordon Roberts, Friedrich Taenzler, Mark Burns

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With the proliferation of complex semiconductor devices containing digital, analog, mixed-signal and radio-frequency circuits, the economics of test has come to the forefront and today's engineer needs to be fluent in all four circuit types. Having access to a book that covers these topicswill help the evolving test engineer immensely and will be an invaluable resource. In addition, the second edition includes lengthy discussion on RF circuits, high-speed I/Os and probabilistic reasoning. Appropriate for the junior/senior university level, this textbook includes hundreds of examples,exercises and problems.

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With the proliferation of complex semiconductor devices containing digital, analog, mixed-signal and radio-frequency circuits, the economics of test has come to the forefront and today's engineer needs to be fluent in all four circuit types. Having access to a book that covers these topicswill help the evolving test engineer immensely ...

Gordon Roberts is a professor in the Department of Electrical and Computer Engineering at McGill University. He has conducted extensive research on analog integrated circuit design and mixed-signal test issues. He has published numerous papers at IEEE conferences, coauthored several textbooks related to mixed-signal test and analog in...

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Format:HardcoverDimensions:976 pages, 9.25 × 7.5 × 0.98 inPublished:November 3, 2011Publisher:Oxford University PressLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:0199796211

ISBN - 13:9780199796212


Extra Content

Table of Contents

1. Overview of Mixed-Signal Testing1.1 MIXED-SIGNAL CIRCUITS1.1.1 Analog, Digital, or Mixed-Signal?1.1.2 Common Types of Analog and Mixed-Signal Circuits1.1.3 Applications of Mixed-Signal Circuits1.2 WHY TEST MIXED-SIGNAL DEVICES?1.2.1 The CMOS Fabrication Process1.2.2 Real-World Circuits1.2.3 What Is a Test Engineer?1.3 POST-SILICON PRODUCTION FLOW1.3.1 Test and Packaging1.3.2 Characterization versus Production Testing1.4 TEST AND DIAGNOSTIC EQUIPMENT1.4.1 Automated Test Equipment1.4.2 Wafer Probers1.4.3 Handlers1.4.4 E-Beam Probers1.4.5 Focused Ion Beam Equipment1.4.6 Forced-Temperature Systems1.5 NEW PRODUCT DEVELOPMENT1.5.1 Concurrent Engineering1.6 MIXED-SIGNAL TESTING CHALLENGES1.6.1 Time to Market1.6.2 Accuracy, Repeatability, and Correlation1.6.3 Electromechanical Fixturing Challenges1.6.4 Economics of Production Testing2. Tester Hardware2.1 MIXED-SIGNAL TESTER OVERVIEW2.1.1 General-Purpose Testers versus Focused Bench Equipment2.1.2 Generic Tester Architecture2.2 DC RESOURCES2.2.1 General-Purpose Multimeters2.2.2 General-Purpose Voltage/Current Sources2.2.3 Precision Voltage References and User Supplies2.2.4 Calibration Source2.2.5 Relay Matrices2.2.6 Relay Control Lines2.3 DIGITAL SUBSYSTEM2.3.1 Digital Vectors2.3.2 Digital Signals2.3.3 Source Memory2.3.4 Capture Memory2.3.5 Pin Card Electronics2.3.6 Timing and Formatting Electronics2.4 AC SOURCE AND MEASUREMENT2.4.1 AC Continuous Wave Source and AC Meter2.4.2 Arbitrary Waveform Generators2.4.3 Waveform Digitizers2.4.4 Clocking and Synchronization2.5 TIME MEASUREMENT SYSTEM2.5.1 Time Measurements2.5.2 Time Measurement Interconnects2.6 RF-SUBSYSTEM2.6.1 Source Path2.6.2 Measurement Path2.7 COMPUTING HARDWARE2.7.1 User Computer2.7.2 Tester Computer2.7.3 Array Processors and Distributed Digital Signal Processors2.7.4 Network Connectivity2.8 SUMMARY3. DC and Parametric Measurements3.1 CONTINUITY3.1.1 Purpose of Continuity Testing3.1.2 Continuity Test Technique3.1.3 Serial versus Parallel Continuity Testing3.2 LEAKAGE CURRENTS3.2.1 Purpose of Leakage Testing3.2.2 Leakage Test Technique3.2.3 Serial versus Parallel Leakage Testing3.3 POWER SUPPLY CURRENTS3.3.1 Importance of Supply Current Tests3.3.2 Test Techniques3.4 DC REFERENCES AND REGULATORS3.4.1 Voltage Regulators3.4.2 Voltage References3.4.3 Trimmable References3.5 IMPEDANCE MEASUREMENTS3.5.1 Input Impedance3.5.2 Output Impedance3.5.3 Differential Impedance Measurements3.6 DC OFFSET MEASUREMENTS3.6.1 VMID and Analog Ground3.6.2 DC Transfer Characteristics (Gain and Offset)3.6.3 Output Offset Voltage (VO,OS)3.6.4 Single-Ended, Differential, and Common-Mode Offsets3.6.5 Input Offset Voltage (VIN,OS)3.7 DC GAIN MEASUREMENTS3.7.1 Closed-Loop Gain3.7.2 Open-Loop Gain3.8 DC POWER SUPPLY REJECTION RATIO3.8.1 DC Power Supply Sensitivity3.8.2 DC Power Supply Rejection Ratio3.9 DC COMMON-MODE REJECTION RATIO3.9.1 CMRR of Op Amps3.9.2 CMRR of Differential Gain Stages3.10 COMPARATOR DC TESTS3.10.1 Input Offset Voltage3.10.2 Threshold Voltage3.10.3 Hysteresis3.11 VOLTAGE SEARCH TECHNIQUES3.11.1 Binary Searches versus Step Searches3.11.2 Linear Searches3.12 DC TESTS FOR DIGITAL CIRCUITS3.12.1 IIH/IIL3.12.2 VIH/VIL3.12.3 VOH/VOL3.12.4 IOH/IOL3.12.5 IOSH and IOSL Short Circuit Current3.13 SUMMARY4. Data Analysis and Probability Theory4.1 DATA VISUALIZATION TOOLS4.1.1 Datalogs (Data Lists)4.1.2 Lot Summaries4.1.3 Wafer Maps4.1.4 Shmoo Plots4.1.5 Histograms4.2 STATISTICAL ANALYSIS4.2.1 Mean (Average) and Standard Deviation (Variance)4.2.2 Probabilities and Probability Density Functions4.2.3 The Standard Gaussian Cumulative Distribution Function ?(z)4.2.4 Verifying Gaussian Behavior: The Kurtosis and Normal Probability Plot4.3 NON-GAUSSIAN DISTRIBUTIONS FOUND IN MIXED-SIGNAL TEST4.3.1 The Uniform Probability Distribution4.3.2 The Sinusoidal Probability Distribution4.3.3 The Binomial Probability Distribution4.4 MODELING THE STRUCTURE OF RANDOMNESS4.4.1 Modeling A Gaussian Mixture Using The Expectation-Maximization Algorithm4.4.2 Probabilities Associated With A Gaussian Mixture Model4.5 SUMS AND DIFFERENCES OF RANDOM VARIABLES4.5.1 The Central Limit Theorem4.6 SUMMARY5. Yield, Measurement Accuracy and Test Time5.1 YIELD5.2 MEASUREMENT TERMINOLOGY5.2.1 Accuracy and Precision5.2.2 Systematic Or Bias Errors5.2.3 Random Errors5.2.4 Resolution (Quantization Error)5.2.5 Repeatability5.2.6 Stability5.2.7 Correlation5.2.8 Reproducibility5.3 A MATHEMATICAL LOOK AT REPEATABILITY, BIAS AND ACCURACY5.4 CALIBRATIONS AND CHECKERS5.4.1 Traceability to Standards5.4.2 Hardware Calibration5.4.3 Software Calibration5.4.4 System Calibrations and Checkers5.4.5 Focused Instrument Calibrations5.4.6 Focused DIB Circuit Calibrations5.5 TESTER SPECIFICATIONS5.6 REDUCING MEASUREMENT ERROR WITH GREATER MEASUREMENT TIME5.6.1 Analog Filtering5.6.2 Averaging5.7 GUARDBANDS5.8 EFFECTS OF MEASUREMENT VARIABILITY ON TEST YIELD5.9 EFFECTS OF REPRODUCIBILTY AND PROCESS VARIATION ON YIELD5.10 STATISTICAL PROCESS CONTROL5.10.1 Goals of SPC5.10.2 Six-Sigma Quality5.10.3 Process Capability, Cp, and Cpk5.10.4 Gauge Repeatability and Reproducibility5.11 SUMMARY6. DAC Testing6.1 BASICS OF DATA CONVERTERS6.1.1 Principles of DAC and ADC Conversion6.1.2 Data Forma6.1.3 Comparison of DACs and ADCs6.1.4 DAC Failure Mechanisms6.2 BASIC DC TESTS6.2.1 Code-Specific Parameters6.2.2 Full-Scale Range6.2.3 DC Gain, Gain Error, Offset, and Offset Error6.2.4 LSB Step Size6.2.5 DC PSS6.3 TRANSFER CURVE TESTS6.3.1 Absolute Error6.3.2 Monotonicity6.3.3 Differential Nonlinearity6.3.4 Integral Nonlinearity6.3.5 Partial Transfer Curves6.3.6 Major Carrier Testing6.3.7 Other Selected-Code Techniques6.4 DYNAMIC DAC TESTS6.4.1 Conversion Time (Settling Time)6.4.2 Overshoot and Undershoot6.4.3 Rise Time and Fall Time6.4.4 DAC-to-DAC Skew6.4.5 Glitch Energy (Glitch Impulse)6.4.6 Clock and Data Feedthrough6.5 TESTS FOR COMMON DAC APPLICATIONS6.5.1 DC References6.5.2 Audio Reconstruction6.5.3 Data Modulation6.5.4 Video Signal Generators6.6 SUMMARY7. ADC TestingADC TESTING VERSUS DAC TESTING7.1.1 Comparison of DACs and ADCs7.1.2 Statistical Behavior of ADCs7.2 ADC CODE EDGE MEASUREMENTS7.2.1 Edge Code Testing versus Center Code Testing7.2.2 Step Search and Binary Search Methods7.2.3 Servo Method7.2.4 Linear Ramp Histogram Method7.2.5 Conversion from Histograms to Code Edge Transfer Curves7.2.6 Accuracy Limitations of Histogram Testing7.2.7 Rising Ramps versus Falling Ramps7.2.8 Sinusoidal Histogram Method7.3 DC TESTS AND TRANSFER CURVE TESTS7.3.1 DC Gain and Offset7.3.2 INL and DNL7.3.3 Monotonicity and Missing Codes7.4 DYNAMIC ADC TESTS7.4.1 Conversion Time, Recovery Time, and Sampling Frequency7.4.2 Aperture Jitter7.4.3 Sparkling7.5 TESTS FOR COMMON ADC APPLICATIONS7.5.1 DC Measurements7.5.2 Audio Digitization7.5.3 Data Transmission7.5.4 Video Digitization7.6 SUMMARY8. Sampling Theory8.1 ANALOG MEASUREMENTS USING DSP8.1.1 Traditional versus DSP-Based Testing of AC Parameters8.2 SAMPLING AND RECONSTRUCTION8.2.1 Use of Sampling and Reconstruction in Mixed-Signal Testing8.2.2 Sampling: Continuous-Time and Discrete-Time Representation8.2.3 Reconstruction8.2.4 The Sampling Theorem and Aliasing8.2.5 Quantization Effects8.2.6 Sampling Jitter8.3 REPETITIVE SAMPLE SETS8.3.1 Finite and Infinite Sample Sets8.3.2 Coherent Signals and Noncoherent Signals8.3.3 Peak-to-RMS Control in Coherent Multitones8.3.4 Spectral Bin Selection8.4 SYNCHRONIZATION OF SAMPLING SYSTEMS8.4.1 Simultaneous Testing of Multiple Sampling Systems8.4.2 ATE Clock Sources8.5 SUMMARY9. DSP-Based Testing9.1 ADVANTAGES OF DSP-BASED TESTING9.1.2 Separation of Signal Components9.1.3 Advanced Signal Manipulations9.2 DIGITAL SIGNAL PROCESSING9.2.1 DSP and Array Processing9.2.2 Fourier Analysis of Periodic Signals9.2.3 The Trigonometric Fourier Series9.2.4 The Discrete-Time Fourier Series9.2.5 Complete Frequency Spectrum9.2.6 Time and Frequency Denormalization9.2.7 Complex Form of the DTFS9.3 DISCRETE-TIME TRANSFORMS9.3.1 The Discrete Fourier Transform9.3.2 The Fast Fourier Transform9.3.3 Interpreting the FFT Output9.3.4 Windowing9.4 THE INVERSE FFT9.4.1 Equivalence of Time- and Frequency-Domain Information9.4.2 Parseval's Theorem9.4.3 Frequency-Domain Filtering9.4.4 Noise Weighting9.5 SUMMARY10. Analog Channel Testing10.1 OVERVIEW10.1.1 Types Of Analog Channels10.1.2 Types Of AC Parametric Tests10.2 GAIN AND LEVEL TESTS10.2.3 Gain Tracking Error10.2.4 PGA Gain Tests10.2.5 Frequency Response10.3 PHASE TESTS10.3.1 Phase Response10.3.2 Group Delay and Group Delay Distortion10.4 DISTORTION TESTS10.4.1 Signal-to-Harmonic Distortion10.4.2 Intermodulation Distortion10.4.3 Adjacent Channel And Noise Power Ratio T10.5 SIGNAL REJECTION TESTS10.5.1 Common-Mode Rejection Ratio10.5.2 Power Supply Rejection and Power Supply Rejection Ratio10.5.3 Channel-to-Channel Crosstalk10.5.4 Clock and Data Feedthrough10.6 NOISE TESTS10.6.1 Noise10.6.2 Idle Channel Noise10.6.3 Signal-to-Noise, Signal-to-Noise-and-Distortion10.6.4 Spurious Free Dynamic Range10.7 SUMMARY11. Sampled Channel Testing11.1 OVERVIEW11.1.1 What Are Sampled Channels?11.1.2 Examples Of Sampled Channels11.1.3 Types of Sampled Channels11.2 SAMPLING CONSIDERATIONS11.2.1 DUT Sampling Rate Constraints11.2.2 Digital Signal Source and Capture11.2.3 Simultaneous DAC and ADC Channel Testing11.2.4 Mismatched Fundamental Frequencies11.2.5 Reconstruction Effects in DACs, AWGs and Other Sampled-Data Circuits11.3 UNDERSAMPLING AND ALIASING11.3.1 Reconstructing The High-Frequency Signal From The Aliased Sample Set11.4 ENCODING AND DECODING11.4.1 Signal Creation and Analysis11.4.2 Intrinsic (Quantization) Errors Associated With The DAC Operation11.5 SAMPLED CHANNEL TESTS11.5.1 Similarity to Analog Channel Tests11.5.2 Absolute Level, Absolute Gain, Gain Error, and Gain Tracking11.5.3 Frequency Response11.5.4 Phase Response (Absolute Phase Shift)11.5.5 Group Delay and Group Delay Distortion11.5.6 Signal to Harmonic Distortion and Intermodulation Distortion11.5.7 Crosstalk11.5.8 CMRR11.5.9 PSR and PSRR11.5.10 Signal-to-Noise Ratio and ENOB11.5.11 Idle Channel Noise11.6 SUMMARY12. Fundamentals of RF Testing12.1 INTRODUCTION TO RF TESTING12.2 SCALAR VERSUS VECTOR MEASURES12.2.1 Wave Definition of Electrical Signals12.2.1 Measures of Electrical Waves12.2.2 Power Definition12.2.3 Crest Factor12.2.4 Power in dBm12.2.5 Power Transfer12.2.6 Conjugate and Reflectionless Matching12.2.7 Power Loss Metrics12.3 NOISE12.3.1 Amplitude Noise12.3.2 Noise Figure12.3.3 Phase Noise12.4 S-PARAMETERS12.4.1 Principles of S-Parameters Of A Two-Port Network12.4.2 Scalar Representation of S-Parameters12.5 MODULATION12.5.1 Analog Modulation12.5.2 Digital Modulation12.5.3 Quadrature Amplitude Modulation12.5.4 Orthogonal Frequency Division Multiplexing12.6 SUMMARY13. RF Testing Methods13.1 SCALAR MEASUREMENT METHODS13.1.1 Principles Of A Scalar Power Measurement13.1.2 Gain Measurement13.1.3 Scalar Power Measures Versus Time13.1.4 Intermodulation Measurement13.1.5 Compression Point Measurement13.2 S-PARAMETER MEASUREMENTS13.2.1 Principles Of A Directional Coupler13.2.2 Directional Couplers On An Ate13.3 NOISE FIGURE AND NOISE FACTOR13.3.1 Noise Figure And Noise Factor Definition13.3.2 Noise Measurement Technique With The Y-Factor Method13.3.3 Noise Measurement Technique With The Cold Noise Method13.3.4 Comparison Of The Noise Figure Test Methods13.4 PHASE NOISE13.4.1 Measuring Phase Noise Using Spectral Analysis13.4.2 PLL-Based Phase Noise Test Method13.4.3 Delay-Line Phase Noise Test Method13.5 VECTOR SIGNAL ANALYSIS13.5.1 In-Phase And Quadrature Signal Representation13.5.2 Test Of Relative Phase13.5.3 Error Vector Magnitude Test Method13.5.4 Adjacent Channel Power Tests13.5.5 Transmit Mask13.5.6 Bit Error Rate13.6 SUMMARY14. Clock and Serial Data Communications Channel Measurements14.1 SYNCHRONOUS AND ASYNCHRONOUS COMMUNICATIONS14.2 TIME-DOMAIN ATTRIBUTES OF A CLOCK SIGNAL14.3 FREQUENCY-DOMAIN ATTRIBUTES OF A CLOCK SIGNAL14.4 COMMUNICATING SERIALLY OVER A CHANNEL14.4.1 Ideal Channel14.4.2 Real Channel Effects14.4.3 Impact of Decision Levels On Receiver Performance14.5 BIT ERROR RATE MEASUREMENT14.5.1 PRBS Test Patterns14.6 METHODS TO SPEED UP BER TESTS IN PRODUCTION14.6.1 Amplitude-Based Scan Test14.6.2 Time-Based Scan Test14.6.3 Dual-Dirac Jitter Decomposition Method14.6.4 Gaussian Mixture Jitter Decomposition Method14.7 DETERMINISTIC JITTER DECOMPOSITION14.7.1 Period And Sinusoidal Jitter (PJ/SJ)14.7.2 Data Dependent Jitter (DDJ)14.7.3 Bounded and Uncorrelated Jitter (BUJ)14.8 JITTER TRANSMISSION TESTS14.8.1 Jitter Transfer Test14.8.2 Jitter Tolerance Test14.9 SUMMARY15. Tester Interfacing - DIB Design15.1 DIB BASICS 71315.1.1 Purpose of a Device Interface Board15.1.2 DIB Configurations15.1.3 Importance of Good DIB Design15.2 PRINTED CIRCUIT BOARDS15.2.1 Prototype DIBs versus PCB DIBs15.2.2 PCB CAD Tools15.2.3 Multilayer PCBs15.2.4 PCB Materials15.3 DIB TRACES, SHIELDS, AND GUARDS15.3.1 Trace Parasitics15.3.2 Trace Resistance15.3.3 Trace Inductance15.3.4 Trace Capacitance15.3.5 Shielding15.3.6 Driven Guards15.4 TRANSMISSION LINES15.4.1 Various TEM Transmission Line Configurations15.4.2 Transmission Line Discontinuities15.4.3 Lumped- and Distributed-Element Models15.4.4 Transmission Line Termination15.4.5 Parasitic Lumped Elements15.5 IMPEDANCE MATCHING TECHNIQUES FOR RF DIB15.5.1 Introduction To The Smith C15.5.2 Impedance Smith Chart15.5.3 Admittance Smith Chart15.5.4 Immitance Smith Chart15.5.5 Impedance Transformation With Discrete Components On Smith Chart15.5.6 Impedance Matching With A Series And Shunt Component Using The Immitance Smith Chart15.6 GROUNDING AND POWER DISTRIBUTION15.6.1 Grounding15.6.2 Power Distribution15.6.3 Power and Ground Planes15.6.4 Ground Loops15.7 DIB COMPONENTS15.7.1 DUT Sockets and Contactor Assemblies15.7.2 Contact Pads, Pogo Pins, and Socket Pins15.7.3 Electromechanical Relays15.7.4 Socket Pins15.7.5 Resistors15.7.6 Capacitors15.7.7 Inductors and Ferrite Beads15.7.8 Transformers and Power Splitters15.8 COMMON DIB CIRCUITS15.8.1 Analog Buffers (Voltage Followers)15.8.2 Instrumentation Amplifiers15.8.3 VMID Reference Adder15.8.4 Current-to-Voltage and Voltage-to-Current Conversions15.8.5 Power Supply Ripple Circuits15.9 COMMON DIB MISTAKES15.9.1 Poor Power Supply and Ground Layout15.9.2 Crosstalk15.9.3 Transmission Line Discontinuities15.9.4 Resistive Drops in Circuit Traces15.9.5 Tester Instrument Parasitics15.9.6 Oscillations in Active Circuits15.9.7 Poor DIB Component Placement and PCB Layout15.10 SUMMARY16. Design-for-Test (DfT)16.1 OVERVIEW16.1.1 What Is DfT?16.1.2 Built-In Self-Test16.1.3 Differences between Digital DfT and Analog DfT16.1.4 Why Should We Use DfT?16.2 ADVANTAGES OF DfT16.2.1 Lower Cost of Test16.2.2 Increased Fault Coverage and Improved Process Control16.2.3 Diagnostics and Characterization16.2.4 System-Level Diagnostics16.3 DIGITAL SCAN16.3.1 Scan Basics16.3.2 IEEE Std. 1149.1 Standard Test Access Port and Boundary Scan16.3.3 Full Scan and Partial Scan16.4 DIGITAL BIST16.4.1 Pseudorandom BILBO Circuits16.4.2 Memory BIST16.4.3 Microcode BIST16.5 DIGITAL DfT FOR MIXED-SIGNAL CIRCUITS16.5.1 Partitioning16.5.2 Digital Resets and Presets16.5.3 Device-Driven Timing16.6 MIXED-SIGNAL BOUNDARY SCAN AND BIST16.6.1 Mixed-Signal Boundary Scan (IEEE Std. 1149.4)16.6.2 Analog and Mixed-Signal BIST16.7 AD HOC MIXED-SIGNAL DfT16.7.1 Common Concepts16.7.2 Accessibility of Analog Signals16.7.3 Analog Test Buses, T-Switches, and Bypass Modes16.7.4 Separation of Analog and Digital Blocks16.7.5 Loopback Modes16.7.6 Precharging Circuits and AC Coupling Shorts16.7.7 On-Chip Sampling Circuits16.7.8 PLL Testability Circuits16.7.9 DAC and ADC Converters16.8 RF DfT16.8.1 RF Loop-back test16.8.2 RF BIT and BIST16.8.3 Correlation-based Test16.9 SUMMARYAppendixProblem AnswersIndex