Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers by Pui-In MakAnalog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers by Pui-In Mak

Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless Transceivers

byPui-In Mak, Ben U Seng Pan, Rui Paulo Martins

Paperback | November 20, 2010

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This book presents architectural and circuit techniques for wireless transceivers to achieve multistandard and low-voltage compliance. It provides an up-to-date survey and detailed study of the state-of-the-art transceivers for modern single- and multi-purpose wireless communication systems. The book includes comprehensive analysis and design of multimode reconfigurable receivers and transmitters for an efficient multistandard compliance.
Title:Analog-Baseband Architectures and Circuits for Multistandard and Low-Voltage Wireless TransceiversFormat:PaperbackDimensions:200 pages, 9.25 × 6.1 × 0.07 inPublished:November 20, 2010Publisher:Springer NetherlandsLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:9048176409

ISBN - 13:9789048176403

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Table of Contents

Dedication. Preface. Acknowledgements. List of Abbreviations. 1: Introduction. 1.1. Evolution of wireless communications. 1.2. Wireless-IC developments - design challenges and future prospects. 1.3. Research objectives. References. 2: Transceiver Architecture Selection - Review, State-of-the-Art Survey and Case Study. 2.1. Introduction. 2.2. Receiver (RX) architectures. 2.3. Transmitter (TX) architectures. 2.4. RX and TX architectures for modern wireless communication systems. 2.5. Survey of the state-of-the-art works for modern wireless standards. 2.6. Case study. 2.7. Summary. References. 3: Two-Step Channel Selection - A Technique for Multistandard Transceiver Front-Ends. 3.1. Introduction. 3.2. Conventional and proposed channel-selection schemes. 3.3. Low-IF/zero-IF reconfigurable receiver design. 3.4. Direct-up/two-step-up reconfigurable transmitter design. 3.5. Reconfigurable IF AFE design. 3.6. Summary. References. 4: System Design of a SiP Receiver for IEEE 802.11a/b/g WLAN. 4.1. Introduction. 4.2. System design. 4.3. Translating the 802.11a, b and g standards to receiver design specification. 4.4. Gain plan. 4.5. Specification of analog baseband. 4.6. ADC requirement. 4.7. Summary. References. 5: Low-Voltage Analog-Baseband Techniques. 5.1. Introduction. 5.2. OpAmp. 5.3. CT level shifter. 5.4. Linear R-to-I converter. 5.5. CT CMFB. 5.6. Current switch. 5.7. MOS Capacitor. 5.8. Inside-OpAmp dc-offset canceler (DOC). 5.9. Series-switching mixer-quad, multi-phase I/Q generator and CSF (co-design). 5.10. SCR programmable-gain amplifier. 5.11. Techniques reusability in advanced technology nodes. 5.12. Summary. References. 6: An Experimental 1-V SiP Receiver Analog-Baseband IC for IEEE 802.11a/b/g WLAN. 6.1. Introduction. 6.2. Receiver architecture. 6.3. Simulation methodology. 6.4. Circuit implementation. 6.5. Simulation results. 6.6. Silicon implementation and test strategy. 6.7. Experimental results. 6.8. Summary. References.7: Conclusions. 7.1. Concluding remarks. 7.2. Benchmarks. 7.3. Recommendations for future work. References.