Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs by Brandon NoiaDesign-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs by Brandon Noia

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

byBrandon Noia, Krishnendu Chakrabarty

Hardcover | December 2, 2013

Pricing and Purchase Info

$160.36 online 
$193.50 list price save 17%
Earn 802 plum® points

Prices and offers may vary in store

Quantity:

In stock online

Ships free on orders over $25

Not available in stores

about

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.
Krishnendu Chakrabarty is a Professor of Electrical and Computer Engineering at Duke University. He received his PhD from University of Michigan. He is a Fellow of IEEE and a Distinguished Engineer of ACM.
Loading
Title:Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICsFormat:HardcoverDimensions:245 pagesPublished:December 2, 2013Publisher:Springer-Verlag/Sci-Tech/TradeLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:3319023772

ISBN - 13:9783319023779

Look for similar items by category:

Reviews

Table of Contents

Introduction.- Wafer Stacking and 3D Memory Test.- Built-in Self-Test for TSVs.- Pre-Bond TSV Test Through TSV Probing.- Pre-Bond TSV Test Through TSV Probing.- Overcoming the Timing Overhead of Test Architectures on Inter-Die Critical Paths.- Post-Bond Test Wrappers and Emerging Test Standards.- Test-Architecture Optimization and Test Scheduling.- Conclusions.