Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute by John Michael WilliamsDigital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute by John Michael Williams

Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute

byJohn Michael Williams

Hardcover | July 8, 2014

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This book is structured as a step-by-step course of study along the lines of a VLSI integrated circuit design project. The entire Verilog language is presented, from the basics to everything necessary for synthesis of an entire 70,000 transistor, full-duplex serializer-deserializer, including synthesizable PLLs. The author includes everything an engineer needs for in-depth understanding of the Verilog language: Syntax, synthesis semantics, simulation and test. Complete solutions for the 27 labs are provided in the downloadable files that accompany the book. For readers with access to appropriate electronic design tools, all solutions can be developed, simulated, and synthesized as described in the book. A partial list of design topics includes design partitioning, hierarchy decomposition, safe coding styles, back annotation, wrapper modules, concurrency, race conditions, assertion-based verification, clock synchronization, and design for test. A concluding presentation of special topics includes System Verilog and Verilog-AMS.
After spending some years at sea in the U. S. Navy, John Michael Williams returned to school for degrees at Columbia University, the University of Chicago and Southern Illinois University, eventually studying human vision in postdoctoral study at the University of Michigan. He moved to California in 1982 and spent significant work time...
Title:Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic InstituteFormat:HardcoverDimensions:553 pagesPublished:July 8, 2014Publisher:Springer-Verlag/Sci-Tech/TradeLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:3319047884

ISBN - 13:9783319047881

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Table of Contents

Introduction.- Verilog vectors.- Logical (Boolean) Operators.- Bitwise Operators: Vectors and Reduction.- VCD File Dump.- SDF File Dump.- More Language Constructs.- Procedural Control.- Net Types, Simulation, & Scan.- PLLs and the Ser Des Project.- Date Storage and Verilog Arrays.- Counter Types and Structures.- Contention and Operator Precedence.- Digital Basics: Three-State Buffer and Decoder.- Back to the PLL and the Ser Des.- State Machine and FIFO Design.- Rise-Fall Delays and Event Scheduling.- Built-in Gates and Net Types.- Procedural Control and Concurrency.- Hierarchical Names and generate Blocks.- Serial-Parallel Conversion.- UDPs, Timing Triplets, and Switch-level Models.- Parameter Types and Module Connection.- Hierarchical Names and Design Partitions.- Verilog Configurations.- Timing Arcs and specify Delays.- Timing Checks and Pulse Controls.- The Sequential Deserializer.- PLL Redesign.- The Concurrent Deserializer.- The Serializer and the SerDes.- Design For Test(DFT).- DFT for a Full-Duplex SerDes.- SDF Back-Annotation.- Wrap-up: TheVerilog Language.- Deep-Submicron Problems and Verification.- System Verilog.- Verilog-AMS.

Editorial Reviews

"As the title states, this is a textbook for a graduate course on digital design. . the text is mostly oriented to the professor, providing a perfect tool to drive the course. The text is well structured by weeks and class sessions . needed to cover most of the aspects involved in an introductory digital design course. . I am sure that students using this book will learn enough to start working in any Silicon company." (Javier Castillo, Computing Reviews, March, 2015)