Dynamic Reconfigurable Architectures And Transparent Optimization Techniques: Automatic Acceleration Of Software Execution by Antonio Carlos Schneider Beck Fl.Dynamic Reconfigurable Architectures And Transparent Optimization Techniques: Automatic Acceleration Of Software Execution by Antonio Carlos Schneider Beck Fl.

Dynamic Reconfigurable Architectures And Transparent Optimization Techniques: Automatic…

byAntonio Carlos Schneider Beck Fl.

Hardcover | March 11, 2010

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Dynamic Reconfigurable Architectures and Transparent Optimization Techniques presents a detailed study on new techniques to cope with the aforementioned limitations. First, characteristics of reconfigurable systems are discussed in details, and a large number of case studies is shown. Then, a detailed analysis of several benchmarks demonstrates that such architectures need to attack a diverse range of applications with very different behaviours, besides supporting code compatibility. This requires the use of dynamic optimization techniques, such as Binary Translation and Trace reuse. Finally, works that combine both reconfigurable systems and dynamic techniques are discussed and a quantitative analysis of one them, the DIM architecture, is presented.
Title:Dynamic Reconfigurable Architectures And Transparent Optimization Techniques: Automatic…Format:HardcoverDimensions:242 pages, 9.25 × 6.1 × 0.27 inPublished:March 11, 2010Publisher:Springer NetherlandsLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:9048139120

ISBN - 13:9789048139125

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Table of Contents

1. Introduction. 1.1 Challenges. 1.2 Main Motivations. 1.3 This Book.2. Reconfigurable Systems. 2.1 Introduction. 2.2 Basic Principles. 2.3 How It Works. 2.4 Advantages of using Reconfigurable Logic. 2.5 Classification. 2.6 Directions. 3. Deployment of Reconfigurable Systems. 3.1 Introduction. 3.2 Examples.3.3 Recent Dataflow Architectures. 3.4 Summary and Comparative Tables.4. Dynamic Optimization Techniques. 4.1 Introduction. 4.2 Binary Translation. 4.3 Reuse. 5. Dynamic Detection and Reconfiguration. 5.1 Warp Processing. 5.2 Configurable Compute Array. 5.3 Drawbacks. 6. The DIM Reconfigurable System. 6.1 Introduction. 6.2 The Reconfigurable Array in Details. 6.3 Translation, Reconfiguration and Execution. 6.4 The BT Algorithm in Details. 6.5 Case Studies. 6.6 DIM in Stack Machines. 6.7 On-Going and Future works. 7. Conclusions and Future Trends. 7.1 Introduction. 7.2 Decreasing the routing area of Reconfigurable Systems. 7.3 Measuring the impact of the OS in reconfigurable systems. 7.4 Reconfigurable systems to increase the Yield. 7.5 Study of the area overhead with technology scaling and future technologies. 7.6 Scheduling targeting to Low-Power. 7.7 Comparison against a Fine-Grain reconfigurable system. 7.8 Reconfigurable Systems Attacking Different levels of Instruction Granularity.