Multi-Core Cache Hierarchies by Rajeev BalasubramonianMulti-Core Cache Hierarchies by Rajeev Balasubramonian

Multi-Core Cache Hierarchies

byRajeev Balasubramonian

Paperback | June 1, 2011

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A key determinant of overall system performance and power dissipation is the cache hierarchy since access to off-chip memory consumes many more cycles and energy than on-chip accesses. In addition, multi-core processors are expected to place ever higher bandwidth demands on the memory system. All these issues make it important to avoid off-chip memory access by improving the efficiency of the on-chip cache. Future multi-core processors will have many large cache banks connected by a network and shared by many cores. Hence, many important problems must be solved: cache resources must be allocated across many cores, data must be placed in cache banks that are near the accessing core, and the most important data must be identified for retention. Finally, difficulties in scaling existing technologies require adapting to and exploiting new technology constraints. The book attempts a synthesis of recent cache research that has focused on innovations for multi-core processors. It is an excellent starting point for early-stage graduate students, researchers, and practitioners who wish to understand the landscape of recent cache research. The book is suitable as a reference for advanced computer architecture classes as well as for experienced researchers and VLSI engineers.
Title:Multi-Core Cache HierarchiesFormat:PaperbackDimensions:153 pages, 9.25 × 7.5 × 0.68 inPublished:June 1, 2011Publisher:MORGAN & CLAYPOOL PUBLISHERSLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:1598297538

ISBN - 13:9781598297539

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