Resource Efficient Ldpc Decoders: From Algorithms To Hardware Architectures by Sayed Mahfuzul AzizResource Efficient Ldpc Decoders: From Algorithms To Hardware Architectures by Sayed Mahfuzul Aziz

Resource Efficient Ldpc Decoders: From Algorithms To Hardware Architectures

bySayed Mahfuzul Aziz, Vikram A. Chandrasetty

Paperback | October 1, 2017

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Resource Efficient LDPC Decoders: From Algorithms to Hardware Architecturestakes a practical hands-on approach to developing low complexity algorithms and how to transform them into working hardware. It follows a complete design approach, from algorithms to hardware architectures , and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms. Readers will learn modern techniques to design, model and analyze low complexity LDPC algorithms, along with tactics on their hardware implementation, how to reduce computational complexity and power consumption using computer-aided design techniques, and all aspects of the design spectrum, from algorithms to hardware implementation and performance tradeoffs.



  • Provides extensive treatment of LDPC decoding algorithms and hardware implementations
  • Presents systematic guidance, giving a basic understanding of LDPC codes and decoding algorithms
  • Addresses some of the challenges associated with design, providing insight into implementing innovative architectures
Vikram has substantial experience as a professional engineer. He has worked on hardware design, ASIC design, error correction coding and communication for renowned companies including Motorola and Wave Semiconductor (USA). During two years of post-doctoral research fellowship at University of New Castle (Australia) he worked on designi...
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Title:Resource Efficient Ldpc Decoders: From Algorithms To Hardware ArchitecturesFormat:PaperbackDimensions:475 pages, 9.41 × 7.24 × 0.98 inPublished:October 1, 2017Publisher:Academic PressLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:0128112557

ISBN - 13:9780128112557

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Table of Contents

1. Introduction 2. Overview of LDPC codes 3. Structure and flexibility of LDPC codes 4. LDPC decoding algorithms 5. Hardware architectures for LDPC codes 6. Prototyping LDPC codes in the hardware 7. Applications of resource efficient LDPC decoders Appendix-I: C-Programs and MATLAB models for simulating the performance of LDPC encoding/decoding algorithms Appendix-II: HDL codes for FPGA/ASIC implementation of selected LDPC encoder/decoder architectures