Resource Efficient Ldpc Decoders: From Algorithms To Hardware Architectures by Sayed Mahfuzul Aziz

Resource Efficient Ldpc Decoders: From Algorithms To Hardware Architectures

bySayed Mahfuzul Aziz, Vikram A. Chandrasetty

Paperback | October 1, 2017

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This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms.

The reader will learn:

  • Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementation
  • How to reduce computational complexity and power consumption using computer aided design techniques
  • All aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs

  • Provides extensive treatment of LDPC decoding algorithms and hardware implementations
  • Provides a systematic guidance, giving a basic understanding of LDPC codes and decoding algorithms and providing practical skills in implementing efficient LDPC decoders in hardware

About The Author

Syed Mahfuzul Aziz has over 31 years of experience in research & development, university teaching and industry engagement. Currently a professor of Electrical & Electronic Engineering at the University of South Australia, he has been involved in many industry projects and won competitive government and industry grants. In 1996, he was ...

Details & Specs

Title:Resource Efficient Ldpc Decoders: From Algorithms To Hardware ArchitecturesFormat:PaperbackDimensions:475 pages, 9.41 × 7.24 × 0.98 inPublished:October 1, 2017Publisher:Academic PressLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:0128112557

ISBN - 13:9780128112557

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Extra Content

Table of Contents

1. Introduction 2. Overview of LDPC codes 3. Highly flexible LDPC matrices 4. Efficient LDPC encoding algorithms 5. Reduced complexity LDPC decoding algorithms 6. Hardware architectures for LDPC codes 7. Prototyping LDPC codes in the hardware 8. Applications of resource efficient LDPC decoders