Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits by Rafael Castro LópezReuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits by Rafael Castro López

Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits

byRafael Castro López, Francisco V. Fernández, Óscar Guerra-Vinuesa

Paperback | November 10, 2010

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Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits under stringent time-to-market requirements is lagging behind integration capacity, so far keeping pace with still valid Moore's Law. The resulting gap is threatening with slowing down such a phenomenal growth. The design community believes that it is only by means of powerful CAD tools, design methodologies and even a design paradigm shift, that this design gap can be bridged. In this sense, reuse-based design is seen as a promising solution, and concepts such as IP Block, Virtual Component, and Design Reuse have become commonplace thanks to the significant advances in the digital arena. Unfortunately, the very nature of analog and mixed-signal (AMS) design -more subtle, hierarchically loose, and handicraft-demanding- has hindered a similar level of consensus and development. Aiming at the core of the problem, Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits presents a framework for the reuse-based design of AMS circuits. The framework is founded on three key elements: (1) a CAD-supported hierarchical design flow that facilitates the incorporation of AMS reusable blocks, reduces the overall design time, and expedites the management of increasing AMS design complexity; (2) a complete, clear definition of the AMS reusable block, structured into three separate facets or views: the behavioral, structural, and layout facets, the first two for top-down electrical synthesis and bottom-up verification, the latter used during bottom-up physical synthesis; (3) the design for reusability set of tools, methods, and guidelines that, relying on intensive parameterization as well as on design knowledge capture and encapsulation, allows to produce fully reusable AMS blocks. Reuse Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits features a very detailed, tutorial, and in-depth coverage of all issues and must-have properties of reusable AMS blocks, as well as a thorough description of the methods and tools necessary to implement them. For the first time, this has been done hierarchically, covering one by one the different stages of the design flow, allowing us to examine how the reusable block yields its benefits, both in design time and correct performance.
Prof. Ángel Rodríguez-Vázquez has authored and edited numerous books for Springer and Kluwer
Title:Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated CircuitsFormat:PaperbackDimensions:408 pages, 9.45 × 6.3 × 0.07 inPublished:November 10, 2010Publisher:Springer NetherlandsLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:9048172896

ISBN - 13:9789048172894

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Table of Contents

PREFACE.CHAPTER 1 - INTRODUCTION. 1 Problem Overview: The Design Gap. 1.1 Evolution of the semiconductor industry. 1.2 The design gap. 1.2.1 Time-to-market. 1.2.2 Design complexity. 1.3 Analog design automation. 2 Problem definition. 2.1 Hierarchy, abstraction, and views. 2.2 The AMS design flow. 3 Summary.CHAPTER 2 - A REUSE-BASED DESIGN FRAMEWORK FOR ANALOG ICs. 1 Design automation. 1.1 Preliminary definitions. 1.2 The two sides of automation. 1.2.1 Knowledge-based synthesis . 1.2.2 Optimization-based synthesis. 1.2.3 Quality metrics for analog synthesis . 1.3 Knowledge versus optimization-based synthesis. 2. Circuit reuse. 2.1 Preliminary definitions. 2.2. Digital design reuse. 2.3 Analog design reuse. 2.4 Other approaches to analog reuse. 3 The reuse-based design framework. 3.1 The analog reusable block. 3.2 The design reuse flow. 3.2.1 Adopted synthesis approaches. 3.2.2 The top-down path. 3.2.3 The bottom-up path. 3.2.4 The role of the analog reusable block. 3.3 The design for reusability methodology. 4 Summary.CHAPTER 3 - THE ANALOG REUSABLE BLOCK: BEHAVIORAL FACET. 1 Introduction: Why behavioral descriptions? 1.1 Analog behavioral modeling taxonomy. 2 Facing design reuse. 2.1 The design reuse flow: top-down electrical synthesis. 2.2 The design reuse flow: bottom-up verification. 2.3 Characteristics of the behavioral facet of the AMS reusable block. 3 Case study: a quadrature DA transmit interface. 3.1 System description. 3.2 Reusable macromodels. 4 Summary.CHAPTER 4 - THE ANALOG REUSABLE BLOCK: STRUCTURAL FACET. 1 Introduction. 1.1 Adopted sizing approach. 2 Design knowledge encapsulation. 2.1 Netlist-related elements . 2.1.1 Design variables. 2.1.2 Constraints. 2.2 Testbench setups. 2.2.1 Performance feature elements . 2.2.2 Peripheral setup elements. 2.2.3 Component model and process data elements. 2.2.4 Design variables, dependent variables, and constraints . 3 Practical aspects of structural view reuse. 4 Summary.CHAPTER 5 - THE ANALOG REUSABLE BLOCK: LAYOUT FACET. 1 Introduction. 2 Layout retargeting . 2.1 Device mismatch. 2.2 Loading effects. 2.3 Coupling effects. 2.4 Reliability. 2.5 Area occupation. 3 Layout migration. 4 Analog layout strategies. 4.1 Optimization-driven approaches. 4.2 Knowledge-driven approaches. 5 Automated layout generation for design reuse. 6 Layout template: definition and properties. 7 Creating the layout template. 7.1 Device-level layout generation: primitives. 7.1.1 Reuse: migration issues. 7.1.2 Reuse: retargeting issues. 7.1.3 PDLP coding. 7.2 Device-level layout generation: blocks. 7.2.1 Reuse: migration issues. 7.2.2 Reuse: retargeting issues. 7.2.3 PDLB coding. 7.3 Layout template generation. 7.3.1 Reuse: migration issues. 7.3.2 Reuse: retargeting issues. 7.3.3 Layout template coding . 8 Practical implementation of layout-reusable analog blocks. 8.1 Layout languages. 8.2 Implementation examples. 9 Summary.CHAPTER 6 - DESIGN EXAMPLES AND SILICON PROTOTYPE. 1 Introduction. 2 The demonstration vehicle . 2.1 Application area and rationale for architecture selection. 2.2 System specifications and specifications of the analog back-end. 2.3 Hierarchy of the analog back-end. 2.4 Analysis of the analog back-end. 2.4.1 The CT-LP filter. 2.4.2 The PGA. 3 Reusable blocks. 3.1 Reusable blocks: opamps. 3.2 Reusable blocks: analog back-end. 4 Design examples. 4.1 Design example (I): design retargeting and migration of the opamp. 4.1.1 Opamp retargeting in process A (0.35mm). 4.1.2 Opamp migration to process B (0.5mm). 4.2 Design example (II): GSM retargeting of the analog back-end. 4.3 Design example (III): multi-standard retargeting of the analog back-end. 4.4 Automation prototype. 5 Silicon prototype. 6 Costs and benefits. 7 Summary.CHAPTER 7 - LAYOUT-AWARE CIRCUIT SIZING. 1 Introduction. 2 Geometrically constrained sizing. 2.1 Formulation of the problem. 2.2 Review of previous approaches. 2.3 An integrated approach. 2.4 Experimental results. 3 Parasitic-aware sizing. 3.1 Layout parasitics. 3.2 Extraction methods. 3.3 Extraction of parasitics in the design process. 3.4 Demonstration of the parasitic-aware design flow. 4 Summary.APPENDIX A: ANALOG AND MIXED-SIGNAL LAYOUT RULES. 1 Device matching. 1.1 MOS transistors. 1.2 Passive resistors. 1.3 Passive capacitors. 2 Loading effects. 2.1 MOS transistors 3 Coupling effects. 3.1 Substrate coupling. 3.2 Coupling between routing wires. 4 Reliability. 4.1 MOS transistors. 4.2 Passive resistors. 4.3 Routing. 5 Area occupation. 5.1 MOS transistors. 5.2 Passive resistors. 5.3 Passive capacitors.REFERENCES.