Signal And Power Integrity In Digital Systems: Ttl, Cmos, And Bicmos by James E. BuchananSignal And Power Integrity In Digital Systems: Ttl, Cmos, And Bicmos by James E. Buchanan

Signal And Power Integrity In Digital Systems: Ttl, Cmos, And Bicmos

byJames E. BuchananIllustratorBert D. Buchanan

Hardcover | December 1, 1995

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A combination of (McGraw-Hill, 1991), updated as appropriate, this reference-text covers signal and power integrity issues and techniques for managing those issues in high-speed state- of-the-art digital systems built with advanced Schottky transistor- transistor logic (TTL) devices, advanced complementary metal-oxide semiconductor (CMOS) logic devices, and advanced bipolar combined with CMOS (BiCMOS) logic devices. It addresses optimization of the electrical and mechanical environment for high-speed logic devices, with attention to basic electrical and electromagnetic principles, for digital designers new to high-speed logic design. Annotation c. by Book News, Inc., Portland, Or.
Title:Signal And Power Integrity In Digital Systems: Ttl, Cmos, And BicmosFormat:HardcoverDimensions:9.3 × 6.21 × 1.12 inPublished:December 1, 1995Publisher:Ingram

The following ISBNs are associated with this title:

ISBN - 10:0070087342

ISBN - 13:9780070087347

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This book shows designers how to ensure signal integrity and control noise in high-speed digital systems - particularly important in a Pentium-paced environment where functional logic design is no longer separable from electrical and mechanical design. Highlighting TTL, CMOS, and BiCMOS logic applications in a single source, Signal and Power Integrity in Digital Systems provides a practical solutions-oriented approach to a wide variety of relevant interconnection and timing issues. Special features include noise tolerant logic architectures; power distribution techniques that reduce noise; clock distribution techniques that ensure clock signal quality; signal interconnection techniques that reduce crosstalk, signal loading, and transmission-line effects; how to get optimum performance from high-speed memory devices; and system application tips for high-speed PALs, PLAs, FIFOs, and ASICs. Designers will also appreciate the practical engineering approximations provided for the calculation of design parameters along with illustrations and numerous tables usable for q