Skew-Tolerant Circuit Design by David HarrisSkew-Tolerant Circuit Design by David Harris

Skew-Tolerant Circuit Design

byDavid Harris, David Harris

Other | June 16, 2000

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As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits. While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers.


This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew. It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.

* Synthesizes the most recent advances in skew-tolerant design in one cohesive tutorial
* Provides incisive instruction and advice punctuated by humorous illustrations
* Includes exercises to test understanding of key concepts and solutions to selected exercises

David Money Harris is an associate professor of engineering at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II ...
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Title:Skew-Tolerant Circuit DesignFormat:OtherDimensions:300 pages, 1 × 1 × 1 inPublished:June 16, 2000Publisher:Elsevier ScienceLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:0080541267

ISBN - 13:9780080541266

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Table of Contents

Chapter 1 - Introduction
Chapter 2 - Fundamental Concepts
Chapter 3 - IP Switching
Chapter 4 - Tag Switching
Chapter 5 - MPLS Core Protocols
Chapter 6 - Quality of Service
Chapter 7 - Constraint­based routing
Chapter 8 - Virtual Private Networks