Smart AD and DA Conversion by Pieter HarpeSmart AD and DA Conversion by Pieter Harpe

Smart AD and DA Conversion

byPieter Harpe, Hans Hegt, Arthur H.M. van Roermund

Paperback | September 5, 2012

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While technology evolution is beneficial for digital circuits, it can cause performance limitations for analog circuits. To benefit from the technology evolution for analog circuits as well, the smart concept aims at improving the analog performance by using digital intelligence. In Smart AD and DA Conversion, the smart concept is applied to AD and DA converters by using on-chip intelligence to detect analog imperfections and to correct for them.First, general trends and challenges in data converter design are studied and a generalized view on smart conversion is introduced. Then, the smart concept is applied to solve specific imperfections in two design examples: a sub-binary variable-radix current-steering DA converter and a time-interleaved open-loop track&hold circuit. In both cases, the developed concepts are supported by theory and implemented test chips. The examples show that the smart concept can be successfully applied to improve the performance of AD and DA converters with respect to chip area, power consumption, static accuracy and/or dynamic accuracy.
Title:Smart AD and DA ConversionFormat:PaperbackDimensions:167 pages, 23.5 × 15.5 × 0.01 inPublished:September 5, 2012Publisher:Springer-Verlag/Sci-Tech/TradeLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:9400732570

ISBN - 13:9789400732575

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Table of Contents

List of symbols and abbreviations. 1. INTRODUCTION.2. AD AND DA CONVERSION. 1 Introduction. 2 Trends in applications. 3 Trends in technology. 4 Trends in system design. 5 Performance criteria. 6 Conclusion. 3. SMART CONVERSION. 1 Introduction. 2 Smart concept. 3 Application of the smart concept. 4 Focus in this work. 5 Conclusion. 4. SMART DA CONVERSION. 1 Introduction. 2 Area of current-steering DACs. 3 Correction of mismatch errors. 4 Sub-binary variable-radix DAC. 5 Design example. 6 Conclusion. 5. DESIGN OF A SUB-BINARY VARIABLE-RADIX DAC. 1 Schematic design. 2 Layout. 3 Self-measurement-circuit implementation. 4 Experimental results. 5 Conclusion. 6. SMART AD CONVERSION. 1 Introduction. 2 Literature review. 3 High-speed high-resolution AD conversion. 4 Smart calibration. 5 Conclusion. 7. DESIGN OF AN OPEN-LOOP T&H CIRCUIT. 1 Literature review. 2 Design goal. 3 T&H architecture. 4 Sampling core architecture. 5 Output buffer architecture. 6 T&H design. 7 Experimental results. 8 Conclusion. 8. T&H CALIBRATION. 1 Introduction. 2 T&H accuracy. 3 T&H calibration method. 4 Analog correction parameters. 5 Digitally assisted analog correction. 6 Simulation results. 7 Implementation of the calibration method and layout. 8 Experimental results. 9 Conclusion. 9. T&H CALIBRATION FOR TIME-INTERLEAVED ADCS. 1 Introduction. 2 Channel matching in time-interleaved T&H's. 3 Channel mismatch calibration. 4 Channel mismatch detection. 5 Channel mismatch correction. 6 Simulation results. 7 Implementation of the calibration method and layout. 8 Experimental results. 9 Conclusion. 10. CONCLUSIONS. References. Index.