System Level ESD Protection by Vladislav VashchenkoSystem Level ESD Protection by Vladislav Vashchenko

System Level ESD Protection

byVladislav Vashchenko, Mirko Scholz

Hardcover | April 3, 2014

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This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection.  It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations.

Dr. Vladislav Vashchenko is Director of ESD group at Maxim Integrated Corp responsible for major ESD development aspects across the entire $2.4B enterprise. During previous decade he was leading the ESD group at National Semiconductor Corp. and the decade till then he was a key contributor in reliability department of SRI "Pulsar"(Mosc...
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Title:System Level ESD ProtectionFormat:HardcoverDimensions:320 pagesPublished:April 3, 2014Publisher:Springer-Verlag/Sci-Tech/TradeLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:3319032208

ISBN - 13:9783319032207

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Table of Contents

System 1 Level ESD design.- System Level Test Methods.- On-Chip System Level ESD Devices and Clamps.- Latch-up at System-Level Stress.- IC and Systemn ESD Co-Design.