Transistor Level Modeling for Analog/RF IC Design by Wladyslaw GrabinskiTransistor Level Modeling for Analog/RF IC Design by Wladyslaw Grabinski

Transistor Level Modeling for Analog/RF IC Design

EditorWladyslaw Grabinski, Bart Nauwelaers, Dominique Schreurs

Paperback | October 19, 2010

Pricing and Purchase Info

$174.46 online 
$193.95 list price save 10%
Earn 872 plum® points

In stock online

Ships free on orders over $25

Not available in stores


The editors and authors present a wealth of knowledge regarding the most relevant aspects in the field of MOS transistor modeling. The first chapter lays out the 2/3D process and device simulations as an effective tool for a better understanding of the internal behavior of semiconductor structures and this with a focus on high-voltage MOSFET devices. Subsequently, the mainstream developments of both the PSP and the EKV models are discussed in detail. These physics-based MOSFET models are compared to the measurement-based models which are frequently used in RF applications. The comparison includes an overview of the relevant empirical models and measurement techniques. The following chapters include SOI-specific aspects, modeling enhancement of small geometry MOSFET devices and a survey of quantum effects in devices and circuits. Finally, an explanation of hardware description languages such as VHDL-AMS and Verilog-A is offered and shows the possibilities of the practical implementation and standardization of the different modeling methodologies found in the preceding chapters. The variety of subjects and the high quality of content of this volume make it a reference document for researchers and users of MOSFET devices and models. The book can be recommended to everyone who is involved in compact model developments, numerical TCAD modeling, parameter extraction, space-level simulation or model standardization. The book will appeal equally to PhD students who want to understand the ins and outs of MOSFETs as well as to modeling designers working in the analog and high-frequency areas.
Dr. Grabinski, Dr. Nauwelaers and Dr. Scheurs organized the MOS-Modeling workshop at the European Solid-State Devices Conference (ESSDERC) in 2004, and due to popular request will do again at ESSDERC 2005 in Grenoble. Dr. Grabinski is in industry, at Freescale Semiconductor, while Dr. Nauwelaers and Dr. Schreurs are in academia.
POWER/HVMOS Devices Compact Modeling
POWER/HVMOS Devices Compact Modeling

by Wladyslaw Grabinski


Available for download

Not available in stores

Title:Transistor Level Modeling for Analog/RF IC DesignFormat:PaperbackDimensions:308 pages, 9.45 × 6.3 × 0.07 inPublished:October 19, 2010Publisher:Springer NetherlandsLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:9048171482

ISBN - 13:9789048171484

Customer Reviews of Transistor Level Modeling for Analog/RF IC Design


Table of Contents

Foreword; H.IwaiIntroduction; W.Grabinski/ B.Nauwelaers/ D.Schreurs1. 2/3D process and devices simulation; D.Donoval/ A.Vrbicky/ A.Chvala/P.Beno2. PSP: An advanced surface-potential-based mosfet model; R.van Langevelde/ G.Gildenblat3. EKV 3.0 mosfet model; M.Bucher/ A.Bazigos/ F.Drummenacher/ J-M.Sallese/ C.Enz4. Modeling using high-frequency measurements; D.Schreurs5. Empirical FET Models; I.Angelov6. Modeling the SOI MOSFET Nonlinearities; B.Parvais/ A.Siligaris7. Circuit level RF modeling and design; N.Itoh8. On incorporating parasitic quantum effects in classical circuits simulations; F.Felgenhauer/ M.Begoin/ W.Mathis9. Compact modeling of the MOSFET in VHDL-AMS; C.Lallement/ F.Pecheux/ A.Vachoux/ F.Pregaldiny10. Compact modeling in Verilog-A; B.Troyanovsky/ P.O'Halloran/ M.Mierzwinski Index

Editorial Reviews

"A comprehensive book on state of the art emerging MOSFET models for the design and simulation of analog, digital or RF Integrated Circuits." Narain Arora, Cadence Design Systems, California, USA"This book covers modern topics in semiconductor TCAD, circuit simulation, compact models, RF modeling, etc. which are hard to find together anywhere else."  Peter Bendix, Xpedion Design Systems, California, USA