Variation Aware Analog And Mixed-signal Circuit Design In Emerging Multi-gate Cmos Technologies by Michael FuldeVariation Aware Analog And Mixed-signal Circuit Design In Emerging Multi-gate Cmos Technologies by Michael Fulde

Variation Aware Analog And Mixed-signal Circuit Design In Emerging Multi-gate Cmos Technologies

byMichael Fulde

Hardcover | November 23, 2009

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Since scaling of CMOS is reaching the nanometer area serious limitations enforce the introduction of novel materials, device architectures and device concepts. Multi-gate devices employing high-k gate dielectrics are considered as promising solution overcoming these scaling limitations of conventional planar bulk CMOS. Variation Aware Analog and Mixed-Signal Circuit Design in Emerging Multi-Gate CMOS Technologies provides a technology oriented assessment of analog and mixed-signal circuits in emerging high-k and multi-gate CMOS technologies.
Title:Variation Aware Analog And Mixed-signal Circuit Design In Emerging Multi-gate Cmos TechnologiesFormat:HardcoverDimensions:137 pagesPublished:November 23, 2009Publisher:Springer NetherlandsLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:9048132797

ISBN - 13:9789048132799

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Table of Contents

Preface. Danksagung.1 Introduction. 1.1 Motivation. 1.2 Scaling Fundamentals. 1.3 Variability from Analog and Mixed-Signal Perspective.2 Analog Properties of Multi-Gate MOSFETs. 2.1 Introduction to Recent FinFET Technology. 2.2 DC Characteristics. 2.3 Analog and RF Characteristics. 2.4 Matching Behavior. 2.5 Charge-Trapping. 2.6 Self-Heating.3 High-k Related Design Issues. 3.1 Flicker Noise. 3.2 Transient VT Variations and Hysteresis Effects.4 Multi-Gate Related Design Aspects. 4.1 Biasing Circuits. 4.2 Operational Amplifiers. 4.3 Bandgap Reference Circuits. 4.4 D/A Converter. 4.5 Phase-Locked-Loop Circuit. 4.6 RF Building Blocks. 4.7 Self-Heating. 4.8 Selective Fin Width Tuning.5 Multi-Gate Tunneling FETs. 5.1 Principle of Operation and Implementation of MuGTFETs. 5.2 Measurement Results. 5.3 Device Simulation. 5.4 MuGTFET Reference Circuit. 6 Conclusions and Outlook.Symbols and Abbreviations. References.