Verilog Coding for Logic Synthesis by Weng Fook LeeVerilog Coding for Logic Synthesis by Weng Fook Lee

Verilog Coding for Logic Synthesis

byWeng Fook Lee

Hardcover | April 17, 2003

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Provides a practical approach to Verilog design and problem solving.
* Bulk of the book deals with practical design problems that design engineers solve on a daily basis.
* Includes over 90 design examples.
* There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification.
* Book is suitable for use as a textbook in EE departments that have VLSI courses
WENG FOOK LEE is a prominent member of the Technical Staff (MTS) at Advanced Micro Devices (AMD) Design Center. He has vast experience in designing with Verilog and VHDL, and is an acknowledged expert in the field of RTL coding and logic synthesis. Lee is an expert at synthesizing and tweaking design synthesis, and in developing and im...
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Title:Verilog Coding for Logic SynthesisFormat:HardcoverDimensions:309 pages, 9.41 × 6.42 × 0.83 inPublished:April 17, 2003Publisher:WileyLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:0471429767

ISBN - 13:9780471429760

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Table of Contents

Table of Figures.

Table of Examples.

List of Tables.

Preface.

Acknowledgments.

Trademarks.

Introduction.

Asic Design Flow.

Verilog Coding.

Coding Style: Best-Known Method for Synthesis.

Design Example of Programmable Timer.

Design Example of Programmable Logic Block for Peripheral Interface.