VLIW Microprocessor Hardware Design: On ASIC and FPGA by Lee Weng FookVLIW Microprocessor Hardware Design: On ASIC and FPGA by Lee Weng Fook

VLIW Microprocessor Hardware Design: On ASIC and FPGA

byLee Weng Fook

Hardcover | September 18, 2007

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Acquire the Design Information, Methods, and SkillsNeeded to Master the New VLIW Architecture!

VLIW Microprocessor Hardware Design offers you a complete guide to VLIW hardware design—providing state-of-the-art coverage of microarchitectures, RTL coding, ASIC flow, and FPGA flow of design. The book also contains a wide range of skills-building examples, all worked using Verilog, that equip you with a practical, hands-on tutorial for understanding each step in the VLIW microprocessor design process.

Written by Weng Fook Lee, an internationally renowned expert in the field of microprocessor design, this cutting-edge hardware design tool presents unsurpassed coverage of the latests in VLIW microprocessing. Authoritative and comprehensive, VLIW Microprocessor Hardware Design features:

  • Step-by-step information on the VLIW hardware design process
  • A wealth of Verilog-based designs
  • ASIC and FPGA implementations
  • Expert guidance on the best-known methods for RTL coding
  • Over 75 detailed illustrations that clarify each aspect of VLIW design

    Inside this Complete VLIW Microprocessor Toolkit

    • Introduction • Design Methodology • RTL Coding, Testbenching, and Simulation • FPGA Implementation • Testbenches and Simulation Results • Synthesis Results and Gate Level Netlist

Weng Fook Lee is a distinguished Senior Member of the Technical Staff at Emerald Systems Design Center. He holds fourteen design patents and is the author of a previous VHDL book.
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Title:VLIW Microprocessor Hardware Design: On ASIC and FPGAFormat:HardcoverDimensions:219 pages, 9.1 × 6.1 × 0.79 inPublished:September 18, 2007Publisher:McGraw-Hill EducationLanguage:English

The following ISBNs are associated with this title:

ISBN - 10:0071497021

ISBN - 13:9780071497022

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Table of Contents

Chapter 1: Introduction
Chapter 2: Design Methodology
Chapter 3: RTL Coding, Testbenching, and Simulation
Chapter 4: FPGA Implementation
Appendix A: Testbenches and Simulation Results
Appendix B: Synthesis Results and Gate Level Netlist
Bibliography
Index